/***********************************************************************\
*                                                                       *
* This file was created by Component Internal Interface Engine software *
*  Copyright(c) 2000-2012 by Krzysztof Pozniak (pozniak@ise.pw.edu.pl)  *
*                           All Rights Reserved.                        *
*                                                                       *
\***********************************************************************/

package cii_kx1_car3;

import cii_lib.*;

public class CII_KX1_CAR3_cfg_tab {
  private static final CCII_CONFIG_TABLE _tab[] =
  {
    new CCII_CONFIG_TABLE(   0, "$KX1_CAR3",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          -1, "KX1_CAR3"),
    new CCII_CONFIG_TABLE(   0, "CHECK_SUM",                       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,   891042235, null),
    new CCII_CONFIG_TABLE(   0, "BITS_PLL_READY",                  CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.RO,      0,   0,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_DAC_SEL",                    CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,      0,   1,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_ADC_SEL",                    CIIlib.TABLE_TYPE.BITS,    3,    1,    1, CIIlib.TABLE_ACCESS.IR,      0,   2,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_REG_DATA_OUT",               CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,      0,   5,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_REG_DATA_IN",                CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.RO,      0,   6,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_REG_CLK",                    CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.WO,      0,   7,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_REG_STR",                    CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,      0,   8,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_CAL_STR",                    CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.WO,      0,   9,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_GCAL_ENA",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,      1,   0,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_GCAL_ROT_ENA",               CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,      1,   1,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_STAT_PROC_REQ",              CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,      1,   2,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_STAT_PROC_ACK",              CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.RO,      1,   3,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_DAQ_FLASH_ENA",              CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,      1,   4,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_DAQ_DEL_LEDGE",              CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      1,   5,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_DAQ_DEL_HEDGE",              CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      1,   7,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_DAQ_DEL_FMC",                CIIlib.TABLE_TYPE.BITS,    2,    4,    1, CIIlib.TABLE_ACCESS.IR,      1,   9,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_T_ENA",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      2,   0,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_E_ENA",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      2,   2,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_B_ENA",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      2,   4,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_M_ENA",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      2,   6,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_O_ENA",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      2,   8,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_N_ENA",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      2,  10,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_S_ENA",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      2,  12,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_V_ENA",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      2,  14,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_C_ENA",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      2,  16,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_T_NEG",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      3,   0,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_E_NEG",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      3,   2,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_B_NEG",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      3,   4,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_M_NEG",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      3,   6,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_O_NEG",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      3,   8,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_N_NEG",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      3,  10,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_S_NEG",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      3,  12,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_V_NEG",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      3,  14,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_C_NEG",            CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      3,  16,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_T_OR_AND",         CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      4,   0,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_E_OR_AND",         CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      4,   2,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_B_OR_AND",         CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      4,   4,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_M_OR_AND",         CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      4,   6,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_O_OR_AND",         CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      4,   8,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_N_OR_AND",         CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      4,  10,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_S_OR_AND",         CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      4,  12,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_V_OR_AND",         CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      4,  14,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_RATE_FLAG_C_OR_AND",         CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      4,  16,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_FMC_DATA_DELAY",             CIIlib.TABLE_TYPE.BITS,    2,    4,    1, CIIlib.TABLE_ACCESS.IR,      5,   0,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_LEDGE_DATA_DELAY",           CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      5,   8,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_HEDGE_DATA_DELAY",           CIIlib.TABLE_TYPE.BITS,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,      5,  10,          -1, null),
    new CCII_CONFIG_TABLE(   0, "WORD_CHARGE_CAL",                 CIIlib.TABLE_TYPE.WORD,   15,   64,    1, CIIlib.TABLE_ACCESS.IR,      6,   0,          -1, null),
    new CCII_CONFIG_TABLE(   0, "WORD_LEDGE_CHARGE_CAL",           CIIlib.TABLE_TYPE.WORD,   15,    4,    1, CIIlib.TABLE_ACCESS.IR,     70,   0,          -1, null),
    new CCII_CONFIG_TABLE(   0, "WORD_HEDGE_CHARGE_CAL",           CIIlib.TABLE_TYPE.WORD,   15,    4,    1, CIIlib.TABLE_ACCESS.IR,     74,   0,          -1, null),
    new CCII_CONFIG_TABLE(   0, "WORD_CLUSTER_SCALE_POW",          CIIlib.TABLE_TYPE.WORD,    3,    1,    1, CIIlib.TABLE_ACCESS.IR,     78,   0,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_HH_CHAN_ENA",                CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     79,   0,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_HH_HIST_ENA",                CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     79,   1,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_HH_RATE_ENA",                CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     79,   2,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_HH_LEVEL_FIRST",             CIIlib.TABLE_TYPE.BITS,    9,    1,    1, CIIlib.TABLE_ACCESS.IR,     79,   3,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_HH_LEVEL_LAST",              CIIlib.TABLE_TYPE.BITS,    9,    1,    1, CIIlib.TABLE_ACCESS.IR,     79,  12,          -1, null),
    new CCII_CONFIG_TABLE(   0, "BITS_HH_SIM_ENA",                 CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     79,  21,          -1, null),
    new CCII_CONFIG_TABLE(   0, "WORD_FMC_SEL",                    CIIlib.TABLE_TYPE.WORD,    2,    1,    1, CIIlib.TABLE_ACCESS.IR,     80,   0,          -1, null),
    new CCII_CONFIG_TABLE(   0, "WORD_FMC_GTRG_ENA",               CIIlib.TABLE_TYPE.WORD,    4,    1,    1, CIIlib.TABLE_ACCESS.IR,     81,   0,          -1, null),
    new CCII_CONFIG_TABLE(   0, "WORD_FMC_RX_ENA",                 CIIlib.TABLE_TYPE.WORD,    4,    1,    1, CIIlib.TABLE_ACCESS.IR,     82,   0,          -1, null),
    new CCII_CONFIG_TABLE(   1, "COMP_ID",                         CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,           0, "CII_IDENTIFICATOR"),
    new CCII_CONFIG_TABLE(   1, "IPAR_ID_REG_WIDTH",               CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          32, null),
    new CCII_CONFIG_TABLE(   1, "IPAR_USER_REG_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          32, null),
    new CCII_CONFIG_TABLE(   1, "IPAR_IDENTYFIER",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,   891042235, null),
    new CCII_CONFIG_TABLE(   1, "SPAR_CREATOR",                    CIIlib.TABLE_TYPE.SPAR,    4,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          -1, "PERG"),
    new CCII_CONFIG_TABLE(   1, "SPAR_NAME",                       CIIlib.TABLE_TYPE.SPAR,    4,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          -1, "CAR3"),
    new CCII_CONFIG_TABLE(   1, "HPAR_VERSION",                    CIIlib.TABLE_TYPE.HPAR,    4,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          -1, "0001"),
    new CCII_CONFIG_TABLE(   1, "LPAR_IDENTYFIER_CII",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   1, "LPAR_CREATOR_CII",                CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   1, "LPAR_NAME_CII",                   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   1, "LPAR_VERSION_CII",                CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   1, "IPAR_USER_REG_NUM",               CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(   1, "WORD_IDENTYFIER",                 CIIlib.TABLE_TYPE.WORD,   32,    1,    1, CIIlib.TABLE_ACCESS.RO,     83,   0,          -1, null),
    new CCII_CONFIG_TABLE(   1, "WORD_CREATOR",                    CIIlib.TABLE_TYPE.WORD,   32,    1,    1, CIIlib.TABLE_ACCESS.RO,     84,   0,          -1, null),
    new CCII_CONFIG_TABLE(   1, "WORD_NAME",                       CIIlib.TABLE_TYPE.WORD,   32,    1,    1, CIIlib.TABLE_ACCESS.RO,     85,   0,          -1, null),
    new CCII_CONFIG_TABLE(   1, "WORD_VERSION",                    CIIlib.TABLE_TYPE.WORD,   16,    1,    1, CIIlib.TABLE_ACCESS.RO,     86,   0,          -1, null),
    new CCII_CONFIG_TABLE(   1, "WORD_USER",                       CIIlib.TABLE_TYPE.WORD,   32,    4,    1, CIIlib.TABLE_ACCESS.IR,     87,   0,          -1, null),
    new CCII_CONFIG_TABLE(   2, "COMP_SPI",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,           0, "CII_SPI_MASTER"),
    new CCII_CONFIG_TABLE(   2, "IPAR_CLOCK_kHz",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,       62500, null),
    new CCII_CONFIG_TABLE(   2, "IPAR_SPI_CLK_kHz",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,        1000, null),
    new CCII_CONFIG_TABLE(   2, "IPAR_DATA_LEN",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          16, null),
    new CCII_CONFIG_TABLE(   2, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(   2, "MPAR_CPOL_CII",                   CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_STAT"),
    new CCII_CONFIG_TABLE(   2, "MPAR_CPHY_CII",                   CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_STAT"),
    new CCII_CONFIG_TABLE(   2, "MPAR_DATA_OUT_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_STAT"),
    new CCII_CONFIG_TABLE(   2, "BITS_CPOL",                       CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     91,   0,          -1, null),
    new CCII_CONFIG_TABLE(   2, "BITS_CPHY",                       CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     91,   1,          -1, null),
    new CCII_CONFIG_TABLE(   2, "BITS_START",                      CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     91,   2,          -1, null),
    new CCII_CONFIG_TABLE(   2, "BITS_STOP",                       CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.RO,     91,   3,          -1, null),
    new CCII_CONFIG_TABLE(   2, "WORD_DATA_LEN",                   CIIlib.TABLE_TYPE.WORD,    4,    1,    1, CIIlib.TABLE_ACCESS.IR,     92,   0,          -1, null),
    new CCII_CONFIG_TABLE(   2, "WORD_DATA_SEND",                  CIIlib.TABLE_TYPE.WORD,   16,    1,    1, CIIlib.TABLE_ACCESS.IR,     93,   0,          -1, null),
    new CCII_CONFIG_TABLE(   2, "WORD_DATA_ENA",                   CIIlib.TABLE_TYPE.WORD,   16,    1,    1, CIIlib.TABLE_ACCESS.IR,     94,   0,          -1, null),
    new CCII_CONFIG_TABLE(   2, "WORD_DATA_REC",                   CIIlib.TABLE_TYPE.WORD,   16,    1,    1, CIIlib.TABLE_ACCESS.RO,     95,   0,          -1, null),
    new CCII_CONFIG_TABLE(   3, "COMP_TX",                         CIIlib.TABLE_TYPE.COMP,   32,   20,    4, CIIlib.TABLE_ACCESS.NA,     -1,   0,           0, "CII_MUX_DATA_SENDER"),
    new CCII_CONFIG_TABLE(   3, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(   3, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(   3, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(   3, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(   3, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(   3, "IPAR_PART_CHECK_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(   3, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(   3, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   3, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   3, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   3, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   3, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   3, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          -2, null),
    new CCII_CONFIG_TABLE(   3, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   3, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   3, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   3, "LPAR_PART_INPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   3, "LPAR_PART_OUTPUT_REGISTERED",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   3, "MPAR_PART_SWAP_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   3, "MPAR_PART_CHECK_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   3, "MPAR_PART_CHECK_DATA_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   3, "MPAR_PART_CHECK_DATA_ENA_CII",    CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   3, "MPAR_PART_TEST_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   3, "MPAR_PART_TEST_DATA_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   3, "MPAR_PART_TEST_PART_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   3, "MPAR_PART_TEST_DATA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   3, "MPAR_MUX_CLK_INV_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   3, "LPAR_MUX_INPUT_REGISTERED",       CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   3, "LPAR_MUX_STROBE_AUTO_ENA",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   3, "LPAR_MUX_STROBE_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   3, "LPAR_MUX_OUTPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   3, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(   4, "COMP_SEND",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,           3, "CII_PART_DATA_SENDER"),
    new CCII_CONFIG_TABLE(   4, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(   4, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(   4, "IPAR_CHECK_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(   4, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(   4, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(   4, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   4, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   4, "MPAR_SWAP_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   4, "MPAR_CHECK_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   4, "MPAR_CHECK_DATA_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   4, "MPAR_CHECK_DATA_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   4, "MPAR_TEST_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   4, "MPAR_TEST_DATA_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   4, "MPAR_TEST_PART_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   4, "MPAR_TEST_DATA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   4, "BITS_SWAP_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(   4, "BITS_CHECK_ENA",                  CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     96,   0,          -1, null),
    new CCII_CONFIG_TABLE(   4, "BITS_CHECK_DATA_ENA",             CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     96,   1,          -1, null),
    new CCII_CONFIG_TABLE(   4, "BITS_TEST_ENA",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     96,   2,          -1, null),
    new CCII_CONFIG_TABLE(   4, "BITS_TEST_DATA_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     96,   3,          -1, null),
    new CCII_CONFIG_TABLE(   4, "BITS_TEST_PART_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     96,   4,          -1, null),
    new CCII_CONFIG_TABLE(   4, "WORD_CHECK_DATA",                 CIIlib.TABLE_TYPE.WORD,    4,    1,    1, CIIlib.TABLE_ACCESS.IR,     97,   0,          -1, null),
    new CCII_CONFIG_TABLE(   4, "WORD_TEST_DATA",                  CIIlib.TABLE_TYPE.WORD,   10,    1,    1, CIIlib.TABLE_ACCESS.IR,     98,   0,          -1, null),
    new CCII_CONFIG_TABLE(   5, "COMP_MUX",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,           3, "CII_DATA_MUX"),
    new CCII_CONFIG_TABLE(   5, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(   5, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(   5, "IPAR_MUX_DATA_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(   5, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   5, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(   5, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   5, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   5, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   5, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   5, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          -2, null),
    new CCII_CONFIG_TABLE(   5, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   5, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   5, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   5, "LPAR_MUX_STROBE_AUTO_ENA",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   5, "MPAR_CLK_INV_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   5, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   5, "LPAR_MUX_INPUT_REGISTERED",       CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   5, "LPAR_MUX_OUTPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   5, "BITS_CLK_INV",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(   6, "COMP_TX",                         CIIlib.TABLE_TYPE.COMP,   32,   20,    4, CIIlib.TABLE_ACCESS.NA,     -1,   1,           0, "CII_MUX_DATA_SENDER"),
    new CCII_CONFIG_TABLE(   6, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(   6, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(   6, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(   6, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(   6, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(   6, "IPAR_PART_CHECK_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(   6, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(   6, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   6, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   6, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   6, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   6, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   6, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          -2, null),
    new CCII_CONFIG_TABLE(   6, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   6, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   6, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   6, "LPAR_PART_INPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   6, "LPAR_PART_OUTPUT_REGISTERED",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   6, "MPAR_PART_SWAP_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   6, "MPAR_PART_CHECK_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   6, "MPAR_PART_CHECK_DATA_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   6, "MPAR_PART_CHECK_DATA_ENA_CII",    CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   6, "MPAR_PART_TEST_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   6, "MPAR_PART_TEST_DATA_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   6, "MPAR_PART_TEST_PART_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   6, "MPAR_PART_TEST_DATA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   6, "MPAR_MUX_CLK_INV_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   6, "LPAR_MUX_INPUT_REGISTERED",       CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   6, "LPAR_MUX_STROBE_AUTO_ENA",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   6, "LPAR_MUX_STROBE_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   6, "LPAR_MUX_OUTPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   6, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(   7, "COMP_SEND",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,           6, "CII_PART_DATA_SENDER"),
    new CCII_CONFIG_TABLE(   7, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(   7, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(   7, "IPAR_CHECK_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(   7, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(   7, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(   7, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   7, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   7, "MPAR_SWAP_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   7, "MPAR_CHECK_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   7, "MPAR_CHECK_DATA_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   7, "MPAR_CHECK_DATA_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   7, "MPAR_TEST_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   7, "MPAR_TEST_DATA_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   7, "MPAR_TEST_PART_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   7, "MPAR_TEST_DATA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   7, "BITS_SWAP_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(   7, "BITS_CHECK_ENA",                  CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     99,   0,          -1, null),
    new CCII_CONFIG_TABLE(   7, "BITS_CHECK_DATA_ENA",             CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     99,   1,          -1, null),
    new CCII_CONFIG_TABLE(   7, "BITS_TEST_ENA",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     99,   2,          -1, null),
    new CCII_CONFIG_TABLE(   7, "BITS_TEST_DATA_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     99,   3,          -1, null),
    new CCII_CONFIG_TABLE(   7, "BITS_TEST_PART_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,     99,   4,          -1, null),
    new CCII_CONFIG_TABLE(   7, "WORD_CHECK_DATA",                 CIIlib.TABLE_TYPE.WORD,    4,    1,    1, CIIlib.TABLE_ACCESS.IR,    100,   0,          -1, null),
    new CCII_CONFIG_TABLE(   7, "WORD_TEST_DATA",                  CIIlib.TABLE_TYPE.WORD,   10,    1,    1, CIIlib.TABLE_ACCESS.IR,    101,   0,          -1, null),
    new CCII_CONFIG_TABLE(   8, "COMP_MUX",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,           6, "CII_DATA_MUX"),
    new CCII_CONFIG_TABLE(   8, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(   8, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(   8, "IPAR_MUX_DATA_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(   8, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   8, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(   8, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   8, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   8, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   8, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   8, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          -2, null),
    new CCII_CONFIG_TABLE(   8, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   8, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   8, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   8, "LPAR_MUX_STROBE_AUTO_ENA",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   8, "MPAR_CLK_INV_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   8, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   8, "LPAR_MUX_INPUT_REGISTERED",       CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   8, "LPAR_MUX_OUTPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   8, "BITS_CLK_INV",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(   9, "COMP_TX",                         CIIlib.TABLE_TYPE.COMP,   32,   20,    4, CIIlib.TABLE_ACCESS.NA,     -1,   2,           0, "CII_MUX_DATA_SENDER"),
    new CCII_CONFIG_TABLE(   9, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(   9, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(   9, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(   9, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(   9, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(   9, "IPAR_PART_CHECK_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(   9, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(   9, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   9, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   9, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   9, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   9, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   9, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          -2, null),
    new CCII_CONFIG_TABLE(   9, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   9, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   9, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   9, "LPAR_PART_INPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   9, "LPAR_PART_OUTPUT_REGISTERED",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   9, "MPAR_PART_SWAP_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   9, "MPAR_PART_CHECK_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   9, "MPAR_PART_CHECK_DATA_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   9, "MPAR_PART_CHECK_DATA_ENA_CII",    CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   9, "MPAR_PART_TEST_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   9, "MPAR_PART_TEST_DATA_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   9, "MPAR_PART_TEST_PART_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   9, "MPAR_PART_TEST_DATA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   9, "MPAR_MUX_CLK_INV_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(   9, "LPAR_MUX_INPUT_REGISTERED",       CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   9, "LPAR_MUX_STROBE_AUTO_ENA",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   9, "LPAR_MUX_STROBE_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(   9, "LPAR_MUX_OUTPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(   9, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  10, "COMP_SEND",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,           9, "CII_PART_DATA_SENDER"),
    new CCII_CONFIG_TABLE(  10, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  10, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  10, "IPAR_CHECK_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  10, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  10, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  10, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  10, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  10, "MPAR_SWAP_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  10, "MPAR_CHECK_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  10, "MPAR_CHECK_DATA_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  10, "MPAR_CHECK_DATA_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  10, "MPAR_TEST_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  10, "MPAR_TEST_DATA_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  10, "MPAR_TEST_PART_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  10, "MPAR_TEST_DATA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  10, "BITS_SWAP_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  10, "BITS_CHECK_ENA",                  CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    102,   0,          -1, null),
    new CCII_CONFIG_TABLE(  10, "BITS_CHECK_DATA_ENA",             CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    102,   1,          -1, null),
    new CCII_CONFIG_TABLE(  10, "BITS_TEST_ENA",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    102,   2,          -1, null),
    new CCII_CONFIG_TABLE(  10, "BITS_TEST_DATA_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    102,   3,          -1, null),
    new CCII_CONFIG_TABLE(  10, "BITS_TEST_PART_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    102,   4,          -1, null),
    new CCII_CONFIG_TABLE(  10, "WORD_CHECK_DATA",                 CIIlib.TABLE_TYPE.WORD,    4,    1,    1, CIIlib.TABLE_ACCESS.IR,    103,   0,          -1, null),
    new CCII_CONFIG_TABLE(  10, "WORD_TEST_DATA",                  CIIlib.TABLE_TYPE.WORD,   10,    1,    1, CIIlib.TABLE_ACCESS.IR,    104,   0,          -1, null),
    new CCII_CONFIG_TABLE(  11, "COMP_MUX",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,           9, "CII_DATA_MUX"),
    new CCII_CONFIG_TABLE(  11, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  11, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  11, "IPAR_MUX_DATA_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  11, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  11, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  11, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  11, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  11, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  11, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  11, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          -2, null),
    new CCII_CONFIG_TABLE(  11, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  11, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  11, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  11, "LPAR_MUX_STROBE_AUTO_ENA",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  11, "MPAR_CLK_INV_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  11, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  11, "LPAR_MUX_INPUT_REGISTERED",       CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  11, "LPAR_MUX_OUTPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  11, "BITS_CLK_INV",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  12, "COMP_TX",                         CIIlib.TABLE_TYPE.COMP,   32,   20,    4, CIIlib.TABLE_ACCESS.NA,     -1,   3,           0, "CII_MUX_DATA_SENDER"),
    new CCII_CONFIG_TABLE(  12, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  12, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  12, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  12, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  12, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  12, "IPAR_PART_CHECK_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  12, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  12, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  12, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  12, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  12, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  12, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  12, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          -2, null),
    new CCII_CONFIG_TABLE(  12, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  12, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  12, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  12, "LPAR_PART_INPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  12, "LPAR_PART_OUTPUT_REGISTERED",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  12, "MPAR_PART_SWAP_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  12, "MPAR_PART_CHECK_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  12, "MPAR_PART_CHECK_DATA_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  12, "MPAR_PART_CHECK_DATA_ENA_CII",    CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  12, "MPAR_PART_TEST_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  12, "MPAR_PART_TEST_DATA_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  12, "MPAR_PART_TEST_PART_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  12, "MPAR_PART_TEST_DATA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  12, "MPAR_MUX_CLK_INV_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  12, "LPAR_MUX_INPUT_REGISTERED",       CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  12, "LPAR_MUX_STROBE_AUTO_ENA",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  12, "LPAR_MUX_STROBE_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  12, "LPAR_MUX_OUTPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  12, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  13, "COMP_SEND",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          12, "CII_PART_DATA_SENDER"),
    new CCII_CONFIG_TABLE(  13, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  13, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  13, "IPAR_CHECK_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  13, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  13, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  13, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  13, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  13, "MPAR_SWAP_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  13, "MPAR_CHECK_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  13, "MPAR_CHECK_DATA_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  13, "MPAR_CHECK_DATA_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  13, "MPAR_TEST_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  13, "MPAR_TEST_DATA_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  13, "MPAR_TEST_PART_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  13, "MPAR_TEST_DATA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  13, "BITS_SWAP_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  13, "BITS_CHECK_ENA",                  CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    105,   0,          -1, null),
    new CCII_CONFIG_TABLE(  13, "BITS_CHECK_DATA_ENA",             CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    105,   1,          -1, null),
    new CCII_CONFIG_TABLE(  13, "BITS_TEST_ENA",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    105,   2,          -1, null),
    new CCII_CONFIG_TABLE(  13, "BITS_TEST_DATA_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    105,   3,          -1, null),
    new CCII_CONFIG_TABLE(  13, "BITS_TEST_PART_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    105,   4,          -1, null),
    new CCII_CONFIG_TABLE(  13, "WORD_CHECK_DATA",                 CIIlib.TABLE_TYPE.WORD,    4,    1,    1, CIIlib.TABLE_ACCESS.IR,    106,   0,          -1, null),
    new CCII_CONFIG_TABLE(  13, "WORD_TEST_DATA",                  CIIlib.TABLE_TYPE.WORD,   10,    1,    1, CIIlib.TABLE_ACCESS.IR,    107,   0,          -1, null),
    new CCII_CONFIG_TABLE(  14, "COMP_MUX",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          12, "CII_DATA_MUX"),
    new CCII_CONFIG_TABLE(  14, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  14, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  14, "IPAR_MUX_DATA_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  14, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  14, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  14, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  14, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  14, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  14, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  14, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          -2, null),
    new CCII_CONFIG_TABLE(  14, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  14, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  14, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  14, "LPAR_MUX_STROBE_AUTO_ENA",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  14, "MPAR_CLK_INV_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  14, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  14, "LPAR_MUX_INPUT_REGISTERED",       CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  14, "LPAR_MUX_OUTPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  14, "BITS_CLK_INV",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  15, "COMP_RX",                         CIIlib.TABLE_TYPE.COMP,   32,   20,    4, CIIlib.TABLE_ACCESS.NA,     -1,   0,           0, "CII_MUX_DATA_RECEIVER"),
    new CCII_CONFIG_TABLE(  15, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  15, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  15, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  15, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  15, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  15, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  15, "IPAR_PART_CHECK_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  15, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          21, null),
    new CCII_CONFIG_TABLE(  15, "IPAR_DATA_DELAY_POS",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_DEMUX_STROBE_ENABLE",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_DEMUX_STROBE_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_DEMUX_PROCESS_REGISTERED",   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_DEMUX_OUTPUT_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  15, "IPAR_DEMUX_LAT_DELAY_POS",        CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  15, "MPAR_DEMUX_CLK_INV_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  15, "MPAR_DEMUX_CLK90_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  15, "MPAR_DEMUX_DELAY_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  15, "MPAR_DEMUX_LAT_DELAY_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  15, "LPAR_PART_INPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_PART_INDELAY_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_PART_OUTDELAY_REGISTERED",   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_PART_OUTPUT_REGISTERED",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  15, "MPAR_PART_DELAY_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  15, "MPAR_PART_CLK_INV_CII",           CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  15, "MPAR_PART_SWAP_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  15, "MPAR_PART_CHECK_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  15, "MPAR_PART_CHECK_DATA_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  15, "MPAR_PART_CHECK_DATA_ENA_CII",    CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  15, "MPAR_PART_TEST_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  15, "MPAR_PART_TEST_DATA_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  15, "MPAR_PART_TEST_PART_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  15, "LPAR_PART_VALID_CII",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  15, "LPAR_PART_TEST_DATA_CII",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  15, "IPAR_MUX_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  15, "IPAR_MUX_LAT_DELAY_DATA_WIDTH",   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  15, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  15, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          21, null),
    new CCII_CONFIG_TABLE(  15, "IPAR_PART_DELAY_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  16, "COMP_DEMUX",                      CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          15, "CII_DATA_DEMUX"),
    new CCII_CONFIG_TABLE(  16, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  16, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  16, "IPAR_MUX_DATA_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  16, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  16, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  16, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  16, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  16, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  16, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  16, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  16, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  16, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  16, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  16, "IPAR_MUX_DELAY_POS",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  16, "IPAR_MUX_DELAY_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  16, "IPAR_MUX_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  16, "LPAR_STROBE_ENABLE",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  16, "LPAR_STROBE_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  16, "LPAR_PROCESS_REGISTERED",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  16, "IPAR_LAT_DELAY_POS",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  16, "IPAR_LAT_DELAY_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  16, "IPAR_LAT_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  16, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  16, "MPAR_MUX_CLK_INV_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  16, "MPAR_MUX_CLK90_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  16, "MPAR_MUX_DELAY_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  16, "MPAR_LAT_DELAY_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  16, "LPAR_DATA_CII",                   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  16, "WORD_MUX_CLK_INV",                CIIlib.TABLE_TYPE.BITS,   12,    1,    1, CIIlib.TABLE_ACCESS.IR,    108,   0,          -1, null),
    new CCII_CONFIG_TABLE(  16, "WORD_MUX_CLK90",                  CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  16, "WORD_MUX_DELAY",                  CIIlib.TABLE_TYPE.WORD,   24,    1,    1, CIIlib.TABLE_ACCESS.IR,    109,   0,          -1, null),
    new CCII_CONFIG_TABLE(  16, "WORD_LAT_DELAY",                  CIIlib.TABLE_TYPE.WORD,   24,    1,    1, CIIlib.TABLE_ACCESS.IR,    110,   0,          -1, null),
    new CCII_CONFIG_TABLE(  16, "WORD_DATA",                       CIIlib.TABLE_TYPE.WORD,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,   0,          -1, null),
    new CCII_CONFIG_TABLE(  17, "COMP_REC",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          15, "CII_PART_DATA_RECEIVER"),
    new CCII_CONFIG_TABLE(  17, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  17, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  17, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  17, "IPAR_CHECK_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  17, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          21, null),
    new CCII_CONFIG_TABLE(  17, "IPAR_DELAY_POS",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  17, "IPAR_DELAY_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  17, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  17, "LPAR_INDELAY_REGISTERED",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  17, "LPAR_OUTDELAY_REGISTERED",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  17, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  17, "MPAR_DELAY_CII",                  CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  17, "MPAR_CLK_INV_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  17, "MPAR_SWAP_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  17, "MPAR_CHECK_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  17, "MPAR_CHECK_DATA_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  17, "MPAR_CHECK_DATA_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  17, "MPAR_TEST_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  17, "MPAR_TEST_DATA_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  17, "MPAR_TEST_PART_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  17, "LPAR_VALID_CII",                  CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  17, "LPAR_TEST_DATA_CII",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  17, "BITS_CLK_INV",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  17, "BITS_SWAP_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  17, "BITS_CHECK_ENA",                  CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    111,   0,          -1, null),
    new CCII_CONFIG_TABLE(  17, "BITS_CHECK_DATA_ENA",             CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    111,   1,          -1, null),
    new CCII_CONFIG_TABLE(  17, "BITS_TEST_ENA",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    111,   2,          -1, null),
    new CCII_CONFIG_TABLE(  17, "BITS_TEST_DATA_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    111,   3,          -1, null),
    new CCII_CONFIG_TABLE(  17, "BITS_TEST_PART_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    111,   4,          -1, null),
    new CCII_CONFIG_TABLE(  17, "BITS_DELAY",                      CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  17, "WORD_CHECK_DATA",                 CIIlib.TABLE_TYPE.WORD,    3,    1,    1, CIIlib.TABLE_ACCESS.IR,    112,   0,          -1, null),
    new CCII_CONFIG_TABLE(  17, "WORD_TEST_DATA",                  CIIlib.TABLE_TYPE.WORD,   24,    1,    1, CIIlib.TABLE_ACCESS.RO,    113,   0,          -1, null),
    new CCII_CONFIG_TABLE(  17, "WORD_TEST_OR_DATA",               CIIlib.TABLE_TYPE.WORD,   12,    1,    1, CIIlib.TABLE_ACCESS.RO,    114,   0,          -1, null),
    new CCII_CONFIG_TABLE(  17, "WORD_SYNC_OR_DATA",               CIIlib.TABLE_TYPE.WORD,   12,    1,    1, CIIlib.TABLE_ACCESS.RO,    115,   0,          -1, null),
    new CCII_CONFIG_TABLE(  18, "COMP_RX",                         CIIlib.TABLE_TYPE.COMP,   32,   20,    4, CIIlib.TABLE_ACCESS.NA,     -1,   1,           0, "CII_MUX_DATA_RECEIVER"),
    new CCII_CONFIG_TABLE(  18, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  18, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  18, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  18, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  18, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  18, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  18, "IPAR_PART_CHECK_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  18, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          21, null),
    new CCII_CONFIG_TABLE(  18, "IPAR_DATA_DELAY_POS",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_DEMUX_STROBE_ENABLE",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_DEMUX_STROBE_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_DEMUX_PROCESS_REGISTERED",   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_DEMUX_OUTPUT_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  18, "IPAR_DEMUX_LAT_DELAY_POS",        CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  18, "MPAR_DEMUX_CLK_INV_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  18, "MPAR_DEMUX_CLK90_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  18, "MPAR_DEMUX_DELAY_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  18, "MPAR_DEMUX_LAT_DELAY_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  18, "LPAR_PART_INPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_PART_INDELAY_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_PART_OUTDELAY_REGISTERED",   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_PART_OUTPUT_REGISTERED",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  18, "MPAR_PART_DELAY_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  18, "MPAR_PART_CLK_INV_CII",           CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  18, "MPAR_PART_SWAP_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  18, "MPAR_PART_CHECK_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  18, "MPAR_PART_CHECK_DATA_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  18, "MPAR_PART_CHECK_DATA_ENA_CII",    CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  18, "MPAR_PART_TEST_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  18, "MPAR_PART_TEST_DATA_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  18, "MPAR_PART_TEST_PART_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  18, "LPAR_PART_VALID_CII",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  18, "LPAR_PART_TEST_DATA_CII",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  18, "IPAR_MUX_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  18, "IPAR_MUX_LAT_DELAY_DATA_WIDTH",   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  18, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  18, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          21, null),
    new CCII_CONFIG_TABLE(  18, "IPAR_PART_DELAY_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  19, "COMP_DEMUX",                      CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          18, "CII_DATA_DEMUX"),
    new CCII_CONFIG_TABLE(  19, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  19, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  19, "IPAR_MUX_DATA_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  19, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  19, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  19, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  19, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  19, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  19, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  19, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  19, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  19, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  19, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  19, "IPAR_MUX_DELAY_POS",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  19, "IPAR_MUX_DELAY_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  19, "IPAR_MUX_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  19, "LPAR_STROBE_ENABLE",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  19, "LPAR_STROBE_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  19, "LPAR_PROCESS_REGISTERED",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  19, "IPAR_LAT_DELAY_POS",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  19, "IPAR_LAT_DELAY_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  19, "IPAR_LAT_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  19, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  19, "MPAR_MUX_CLK_INV_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  19, "MPAR_MUX_CLK90_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  19, "MPAR_MUX_DELAY_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  19, "MPAR_LAT_DELAY_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  19, "LPAR_DATA_CII",                   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  19, "WORD_MUX_CLK_INV",                CIIlib.TABLE_TYPE.BITS,   12,    1,    1, CIIlib.TABLE_ACCESS.IR,    116,   0,          -1, null),
    new CCII_CONFIG_TABLE(  19, "WORD_MUX_CLK90",                  CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  19, "WORD_MUX_DELAY",                  CIIlib.TABLE_TYPE.WORD,   24,    1,    1, CIIlib.TABLE_ACCESS.IR,    117,   0,          -1, null),
    new CCII_CONFIG_TABLE(  19, "WORD_LAT_DELAY",                  CIIlib.TABLE_TYPE.WORD,   24,    1,    1, CIIlib.TABLE_ACCESS.IR,    118,   0,          -1, null),
    new CCII_CONFIG_TABLE(  19, "WORD_DATA",                       CIIlib.TABLE_TYPE.WORD,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,   0,          -1, null),
    new CCII_CONFIG_TABLE(  20, "COMP_REC",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          18, "CII_PART_DATA_RECEIVER"),
    new CCII_CONFIG_TABLE(  20, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  20, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  20, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  20, "IPAR_CHECK_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  20, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          21, null),
    new CCII_CONFIG_TABLE(  20, "IPAR_DELAY_POS",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  20, "IPAR_DELAY_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  20, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  20, "LPAR_INDELAY_REGISTERED",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  20, "LPAR_OUTDELAY_REGISTERED",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  20, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  20, "MPAR_DELAY_CII",                  CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  20, "MPAR_CLK_INV_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  20, "MPAR_SWAP_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  20, "MPAR_CHECK_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  20, "MPAR_CHECK_DATA_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  20, "MPAR_CHECK_DATA_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  20, "MPAR_TEST_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  20, "MPAR_TEST_DATA_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  20, "MPAR_TEST_PART_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  20, "LPAR_VALID_CII",                  CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  20, "LPAR_TEST_DATA_CII",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  20, "BITS_CLK_INV",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  20, "BITS_SWAP_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  20, "BITS_CHECK_ENA",                  CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    119,   0,          -1, null),
    new CCII_CONFIG_TABLE(  20, "BITS_CHECK_DATA_ENA",             CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    119,   1,          -1, null),
    new CCII_CONFIG_TABLE(  20, "BITS_TEST_ENA",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    119,   2,          -1, null),
    new CCII_CONFIG_TABLE(  20, "BITS_TEST_DATA_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    119,   3,          -1, null),
    new CCII_CONFIG_TABLE(  20, "BITS_TEST_PART_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    119,   4,          -1, null),
    new CCII_CONFIG_TABLE(  20, "BITS_DELAY",                      CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  20, "WORD_CHECK_DATA",                 CIIlib.TABLE_TYPE.WORD,    3,    1,    1, CIIlib.TABLE_ACCESS.IR,    120,   0,          -1, null),
    new CCII_CONFIG_TABLE(  20, "WORD_TEST_DATA",                  CIIlib.TABLE_TYPE.WORD,   24,    1,    1, CIIlib.TABLE_ACCESS.RO,    121,   0,          -1, null),
    new CCII_CONFIG_TABLE(  20, "WORD_TEST_OR_DATA",               CIIlib.TABLE_TYPE.WORD,   12,    1,    1, CIIlib.TABLE_ACCESS.RO,    122,   0,          -1, null),
    new CCII_CONFIG_TABLE(  20, "WORD_SYNC_OR_DATA",               CIIlib.TABLE_TYPE.WORD,   12,    1,    1, CIIlib.TABLE_ACCESS.RO,    123,   0,          -1, null),
    new CCII_CONFIG_TABLE(  21, "COMP_RX",                         CIIlib.TABLE_TYPE.COMP,   32,   20,    4, CIIlib.TABLE_ACCESS.NA,     -1,   2,           0, "CII_MUX_DATA_RECEIVER"),
    new CCII_CONFIG_TABLE(  21, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  21, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  21, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  21, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  21, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  21, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  21, "IPAR_PART_CHECK_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  21, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          21, null),
    new CCII_CONFIG_TABLE(  21, "IPAR_DATA_DELAY_POS",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_DEMUX_STROBE_ENABLE",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_DEMUX_STROBE_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_DEMUX_PROCESS_REGISTERED",   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_DEMUX_OUTPUT_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  21, "IPAR_DEMUX_LAT_DELAY_POS",        CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  21, "MPAR_DEMUX_CLK_INV_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  21, "MPAR_DEMUX_CLK90_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  21, "MPAR_DEMUX_DELAY_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  21, "MPAR_DEMUX_LAT_DELAY_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  21, "LPAR_PART_INPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_PART_INDELAY_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_PART_OUTDELAY_REGISTERED",   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_PART_OUTPUT_REGISTERED",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  21, "MPAR_PART_DELAY_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  21, "MPAR_PART_CLK_INV_CII",           CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  21, "MPAR_PART_SWAP_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  21, "MPAR_PART_CHECK_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  21, "MPAR_PART_CHECK_DATA_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  21, "MPAR_PART_CHECK_DATA_ENA_CII",    CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  21, "MPAR_PART_TEST_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  21, "MPAR_PART_TEST_DATA_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  21, "MPAR_PART_TEST_PART_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  21, "LPAR_PART_VALID_CII",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  21, "LPAR_PART_TEST_DATA_CII",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  21, "IPAR_MUX_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  21, "IPAR_MUX_LAT_DELAY_DATA_WIDTH",   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  21, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  21, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          21, null),
    new CCII_CONFIG_TABLE(  21, "IPAR_PART_DELAY_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  22, "COMP_DEMUX",                      CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          21, "CII_DATA_DEMUX"),
    new CCII_CONFIG_TABLE(  22, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  22, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  22, "IPAR_MUX_DATA_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  22, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  22, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  22, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  22, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  22, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  22, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  22, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  22, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  22, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  22, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  22, "IPAR_MUX_DELAY_POS",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  22, "IPAR_MUX_DELAY_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  22, "IPAR_MUX_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  22, "LPAR_STROBE_ENABLE",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  22, "LPAR_STROBE_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  22, "LPAR_PROCESS_REGISTERED",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  22, "IPAR_LAT_DELAY_POS",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  22, "IPAR_LAT_DELAY_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  22, "IPAR_LAT_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  22, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  22, "MPAR_MUX_CLK_INV_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  22, "MPAR_MUX_CLK90_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  22, "MPAR_MUX_DELAY_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  22, "MPAR_LAT_DELAY_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  22, "LPAR_DATA_CII",                   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  22, "WORD_MUX_CLK_INV",                CIIlib.TABLE_TYPE.BITS,   12,    1,    1, CIIlib.TABLE_ACCESS.IR,    124,   0,          -1, null),
    new CCII_CONFIG_TABLE(  22, "WORD_MUX_CLK90",                  CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  22, "WORD_MUX_DELAY",                  CIIlib.TABLE_TYPE.WORD,   24,    1,    1, CIIlib.TABLE_ACCESS.IR,    125,   0,          -1, null),
    new CCII_CONFIG_TABLE(  22, "WORD_LAT_DELAY",                  CIIlib.TABLE_TYPE.WORD,   24,    1,    1, CIIlib.TABLE_ACCESS.IR,    126,   0,          -1, null),
    new CCII_CONFIG_TABLE(  22, "WORD_DATA",                       CIIlib.TABLE_TYPE.WORD,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,   0,          -1, null),
    new CCII_CONFIG_TABLE(  23, "COMP_REC",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          21, "CII_PART_DATA_RECEIVER"),
    new CCII_CONFIG_TABLE(  23, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  23, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  23, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  23, "IPAR_CHECK_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  23, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          21, null),
    new CCII_CONFIG_TABLE(  23, "IPAR_DELAY_POS",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  23, "IPAR_DELAY_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  23, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  23, "LPAR_INDELAY_REGISTERED",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  23, "LPAR_OUTDELAY_REGISTERED",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  23, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  23, "MPAR_DELAY_CII",                  CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  23, "MPAR_CLK_INV_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  23, "MPAR_SWAP_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  23, "MPAR_CHECK_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  23, "MPAR_CHECK_DATA_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  23, "MPAR_CHECK_DATA_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  23, "MPAR_TEST_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  23, "MPAR_TEST_DATA_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  23, "MPAR_TEST_PART_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  23, "LPAR_VALID_CII",                  CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  23, "LPAR_TEST_DATA_CII",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  23, "BITS_CLK_INV",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  23, "BITS_SWAP_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  23, "BITS_CHECK_ENA",                  CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    127,   0,          -1, null),
    new CCII_CONFIG_TABLE(  23, "BITS_CHECK_DATA_ENA",             CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    127,   1,          -1, null),
    new CCII_CONFIG_TABLE(  23, "BITS_TEST_ENA",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    127,   2,          -1, null),
    new CCII_CONFIG_TABLE(  23, "BITS_TEST_DATA_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    127,   3,          -1, null),
    new CCII_CONFIG_TABLE(  23, "BITS_TEST_PART_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    127,   4,          -1, null),
    new CCII_CONFIG_TABLE(  23, "BITS_DELAY",                      CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  23, "WORD_CHECK_DATA",                 CIIlib.TABLE_TYPE.WORD,    3,    1,    1, CIIlib.TABLE_ACCESS.IR,    128,   0,          -1, null),
    new CCII_CONFIG_TABLE(  23, "WORD_TEST_DATA",                  CIIlib.TABLE_TYPE.WORD,   24,    1,    1, CIIlib.TABLE_ACCESS.RO,    129,   0,          -1, null),
    new CCII_CONFIG_TABLE(  23, "WORD_TEST_OR_DATA",               CIIlib.TABLE_TYPE.WORD,   12,    1,    1, CIIlib.TABLE_ACCESS.RO,    130,   0,          -1, null),
    new CCII_CONFIG_TABLE(  23, "WORD_SYNC_OR_DATA",               CIIlib.TABLE_TYPE.WORD,   12,    1,    1, CIIlib.TABLE_ACCESS.RO,    131,   0,          -1, null),
    new CCII_CONFIG_TABLE(  24, "COMP_RX",                         CIIlib.TABLE_TYPE.COMP,   32,   20,    4, CIIlib.TABLE_ACCESS.NA,     -1,   3,           0, "CII_MUX_DATA_RECEIVER"),
    new CCII_CONFIG_TABLE(  24, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  24, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  24, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  24, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  24, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  24, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  24, "IPAR_PART_CHECK_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  24, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          21, null),
    new CCII_CONFIG_TABLE(  24, "IPAR_DATA_DELAY_POS",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_DEMUX_STROBE_ENABLE",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_DEMUX_STROBE_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_DEMUX_PROCESS_REGISTERED",   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_DEMUX_OUTPUT_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  24, "IPAR_DEMUX_LAT_DELAY_POS",        CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  24, "MPAR_DEMUX_CLK_INV_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  24, "MPAR_DEMUX_CLK90_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  24, "MPAR_DEMUX_DELAY_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  24, "MPAR_DEMUX_LAT_DELAY_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  24, "LPAR_PART_INPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_PART_INDELAY_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_PART_OUTDELAY_REGISTERED",   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_PART_OUTPUT_REGISTERED",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  24, "MPAR_PART_DELAY_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  24, "MPAR_PART_CLK_INV_CII",           CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  24, "MPAR_PART_SWAP_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  24, "MPAR_PART_CHECK_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  24, "MPAR_PART_CHECK_DATA_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  24, "MPAR_PART_CHECK_DATA_ENA_CII",    CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  24, "MPAR_PART_TEST_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  24, "MPAR_PART_TEST_DATA_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  24, "MPAR_PART_TEST_PART_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  24, "LPAR_PART_VALID_CII",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  24, "LPAR_PART_TEST_DATA_CII",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  24, "IPAR_MUX_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  24, "IPAR_MUX_LAT_DELAY_DATA_WIDTH",   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  24, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  24, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          21, null),
    new CCII_CONFIG_TABLE(  24, "IPAR_PART_DELAY_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  25, "COMP_DEMUX",                      CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          24, "CII_DATA_DEMUX"),
    new CCII_CONFIG_TABLE(  25, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  25, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  25, "IPAR_MUX_DATA_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  25, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  25, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  25, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  25, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  25, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  25, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  25, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  25, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  25, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  25, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  25, "IPAR_MUX_DELAY_POS",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  25, "IPAR_MUX_DELAY_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  25, "IPAR_MUX_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  25, "LPAR_STROBE_ENABLE",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  25, "LPAR_STROBE_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  25, "LPAR_PROCESS_REGISTERED",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  25, "IPAR_LAT_DELAY_POS",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  25, "IPAR_LAT_DELAY_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  25, "IPAR_LAT_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  25, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  25, "MPAR_MUX_CLK_INV_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  25, "MPAR_MUX_CLK90_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  25, "MPAR_MUX_DELAY_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  25, "MPAR_LAT_DELAY_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  25, "LPAR_DATA_CII",                   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  25, "WORD_MUX_CLK_INV",                CIIlib.TABLE_TYPE.BITS,   12,    1,    1, CIIlib.TABLE_ACCESS.IR,    132,   0,          -1, null),
    new CCII_CONFIG_TABLE(  25, "WORD_MUX_CLK90",                  CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  25, "WORD_MUX_DELAY",                  CIIlib.TABLE_TYPE.WORD,   24,    1,    1, CIIlib.TABLE_ACCESS.IR,    133,   0,          -1, null),
    new CCII_CONFIG_TABLE(  25, "WORD_LAT_DELAY",                  CIIlib.TABLE_TYPE.WORD,   24,    1,    1, CIIlib.TABLE_ACCESS.IR,    134,   0,          -1, null),
    new CCII_CONFIG_TABLE(  25, "WORD_DATA",                       CIIlib.TABLE_TYPE.WORD,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,   0,          -1, null),
    new CCII_CONFIG_TABLE(  26, "COMP_REC",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          24, "CII_PART_DATA_RECEIVER"),
    new CCII_CONFIG_TABLE(  26, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  26, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          12, null),
    new CCII_CONFIG_TABLE(  26, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          24, null),
    new CCII_CONFIG_TABLE(  26, "IPAR_CHECK_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  26, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          21, null),
    new CCII_CONFIG_TABLE(  26, "IPAR_DELAY_POS",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  26, "IPAR_DELAY_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  26, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  26, "LPAR_INDELAY_REGISTERED",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  26, "LPAR_OUTDELAY_REGISTERED",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  26, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  26, "MPAR_DELAY_CII",                  CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  26, "MPAR_CLK_INV_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  26, "MPAR_SWAP_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  26, "MPAR_CHECK_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  26, "MPAR_CHECK_DATA_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  26, "MPAR_CHECK_DATA_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  26, "MPAR_TEST_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  26, "MPAR_TEST_DATA_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  26, "MPAR_TEST_PART_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  26, "LPAR_VALID_CII",                  CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  26, "LPAR_TEST_DATA_CII",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  26, "BITS_CLK_INV",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  26, "BITS_SWAP_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  26, "BITS_CHECK_ENA",                  CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    135,   0,          -1, null),
    new CCII_CONFIG_TABLE(  26, "BITS_CHECK_DATA_ENA",             CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    135,   1,          -1, null),
    new CCII_CONFIG_TABLE(  26, "BITS_TEST_ENA",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    135,   2,          -1, null),
    new CCII_CONFIG_TABLE(  26, "BITS_TEST_DATA_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    135,   3,          -1, null),
    new CCII_CONFIG_TABLE(  26, "BITS_TEST_PART_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    135,   4,          -1, null),
    new CCII_CONFIG_TABLE(  26, "BITS_DELAY",                      CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  26, "WORD_CHECK_DATA",                 CIIlib.TABLE_TYPE.WORD,    3,    1,    1, CIIlib.TABLE_ACCESS.IR,    136,   0,          -1, null),
    new CCII_CONFIG_TABLE(  26, "WORD_TEST_DATA",                  CIIlib.TABLE_TYPE.WORD,   24,    1,    1, CIIlib.TABLE_ACCESS.RO,    137,   0,          -1, null),
    new CCII_CONFIG_TABLE(  26, "WORD_TEST_OR_DATA",               CIIlib.TABLE_TYPE.WORD,   12,    1,    1, CIIlib.TABLE_ACCESS.RO,    138,   0,          -1, null),
    new CCII_CONFIG_TABLE(  26, "WORD_SYNC_OR_DATA",               CIIlib.TABLE_TYPE.WORD,   12,    1,    1, CIIlib.TABLE_ACCESS.RO,    139,   0,          -1, null),
    new CCII_CONFIG_TABLE(  27, "COMP_TXEL",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,           0, "CII_MUX_DATA_SENDER"),
    new CCII_CONFIG_TABLE(  27, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  27, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  27, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  27, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  27, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  27, "IPAR_PART_CHECK_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  27, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  27, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  27, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  27, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  27, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  27, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  27, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  27, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  27, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  27, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  27, "LPAR_PART_INPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  27, "LPAR_PART_OUTPUT_REGISTERED",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  27, "MPAR_PART_SWAP_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  27, "MPAR_PART_CHECK_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  27, "MPAR_PART_CHECK_DATA_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  27, "MPAR_PART_CHECK_DATA_ENA_CII",    CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  27, "MPAR_PART_TEST_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  27, "MPAR_PART_TEST_DATA_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  27, "MPAR_PART_TEST_PART_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  27, "MPAR_PART_TEST_DATA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  27, "MPAR_MUX_CLK_INV_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  27, "LPAR_MUX_INPUT_REGISTERED",       CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  27, "LPAR_MUX_STROBE_AUTO_ENA",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  27, "LPAR_MUX_STROBE_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  27, "LPAR_MUX_OUTPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  27, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          20, null),
    new CCII_CONFIG_TABLE(  28, "COMP_SEND",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          27, "CII_PART_DATA_SENDER"),
    new CCII_CONFIG_TABLE(  28, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  28, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  28, "IPAR_CHECK_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  28, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  28, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  28, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  28, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  28, "MPAR_SWAP_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  28, "MPAR_CHECK_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  28, "MPAR_CHECK_DATA_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  28, "MPAR_CHECK_DATA_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  28, "MPAR_TEST_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  28, "MPAR_TEST_DATA_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  28, "MPAR_TEST_PART_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  28, "MPAR_TEST_DATA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  28, "BITS_SWAP_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  28, "BITS_CHECK_ENA",                  CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    140,   0,          -1, null),
    new CCII_CONFIG_TABLE(  28, "BITS_CHECK_DATA_ENA",             CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    140,   1,          -1, null),
    new CCII_CONFIG_TABLE(  28, "BITS_TEST_ENA",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    140,   2,          -1, null),
    new CCII_CONFIG_TABLE(  28, "BITS_TEST_DATA_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    140,   3,          -1, null),
    new CCII_CONFIG_TABLE(  28, "BITS_TEST_PART_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    140,   4,          -1, null),
    new CCII_CONFIG_TABLE(  28, "WORD_CHECK_DATA",                 CIIlib.TABLE_TYPE.WORD,    4,    1,    1, CIIlib.TABLE_ACCESS.IR,    141,   0,          -1, null),
    new CCII_CONFIG_TABLE(  28, "WORD_TEST_DATA",                  CIIlib.TABLE_TYPE.WORD,   10,    1,    1, CIIlib.TABLE_ACCESS.IR,    142,   0,          -1, null),
    new CCII_CONFIG_TABLE(  29, "COMP_MUX",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          27, "CII_DATA_MUX"),
    new CCII_CONFIG_TABLE(  29, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  29, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  29, "IPAR_MUX_DATA_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  29, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  29, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          20, null),
    new CCII_CONFIG_TABLE(  29, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  29, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  29, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  29, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  29, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  29, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  29, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  29, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  29, "LPAR_MUX_STROBE_AUTO_ENA",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  29, "MPAR_CLK_INV_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  29, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  29, "LPAR_MUX_INPUT_REGISTERED",       CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  29, "LPAR_MUX_OUTPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  29, "BITS_CLK_INV",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  30, "COMP_RXEL",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,           0, "CII_MUX_DATA_RECEIVER"),
    new CCII_CONFIG_TABLE(  30, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  30, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  30, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  30, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  30, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  30, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  30, "IPAR_PART_CHECK_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  30, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  30, "IPAR_DATA_DELAY_POS",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_DEMUX_STROBE_ENABLE",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_DEMUX_STROBE_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_DEMUX_PROCESS_REGISTERED",   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_DEMUX_OUTPUT_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  30, "IPAR_DEMUX_LAT_DELAY_POS",        CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  30, "MPAR_DEMUX_CLK_INV_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  30, "MPAR_DEMUX_CLK90_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  30, "MPAR_DEMUX_DELAY_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  30, "MPAR_DEMUX_LAT_DELAY_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  30, "LPAR_PART_INPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_PART_INDELAY_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_PART_OUTDELAY_REGISTERED",   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_PART_OUTPUT_REGISTERED",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  30, "MPAR_PART_DELAY_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  30, "MPAR_PART_CLK_INV_CII",           CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  30, "MPAR_PART_SWAP_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  30, "MPAR_PART_CHECK_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  30, "MPAR_PART_CHECK_DATA_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  30, "MPAR_PART_CHECK_DATA_ENA_CII",    CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  30, "MPAR_PART_TEST_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  30, "MPAR_PART_TEST_DATA_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  30, "MPAR_PART_TEST_PART_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  30, "LPAR_PART_VALID_CII",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  30, "LPAR_PART_TEST_DATA_CII",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  30, "IPAR_MUX_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  30, "IPAR_MUX_LAT_DELAY_DATA_WIDTH",   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  30, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          20, null),
    new CCII_CONFIG_TABLE(  30, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  30, "IPAR_PART_DELAY_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  31, "COMP_DEMUX",                      CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          30, "CII_DATA_DEMUX"),
    new CCII_CONFIG_TABLE(  31, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  31, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  31, "IPAR_MUX_DATA_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  31, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  31, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          20, null),
    new CCII_CONFIG_TABLE(  31, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  31, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  31, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  31, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  31, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  31, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  31, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  31, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  31, "IPAR_MUX_DELAY_POS",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  31, "IPAR_MUX_DELAY_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  31, "IPAR_MUX_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  31, "LPAR_STROBE_ENABLE",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  31, "LPAR_STROBE_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  31, "LPAR_PROCESS_REGISTERED",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  31, "IPAR_LAT_DELAY_POS",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  31, "IPAR_LAT_DELAY_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  31, "IPAR_LAT_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  31, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  31, "MPAR_MUX_CLK_INV_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  31, "MPAR_MUX_CLK90_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  31, "MPAR_MUX_DELAY_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  31, "MPAR_LAT_DELAY_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  31, "LPAR_DATA_CII",                   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  31, "WORD_MUX_CLK_INV",                CIIlib.TABLE_TYPE.BITS,    5,    1,    1, CIIlib.TABLE_ACCESS.IR,    143,   0,          -1, null),
    new CCII_CONFIG_TABLE(  31, "WORD_MUX_CLK90",                  CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  31, "WORD_MUX_DELAY",                  CIIlib.TABLE_TYPE.WORD,   10,    1,    1, CIIlib.TABLE_ACCESS.IR,    144,   0,          -1, null),
    new CCII_CONFIG_TABLE(  31, "WORD_LAT_DELAY",                  CIIlib.TABLE_TYPE.WORD,   10,    1,    1, CIIlib.TABLE_ACCESS.IR,    145,   0,          -1, null),
    new CCII_CONFIG_TABLE(  31, "WORD_DATA",                       CIIlib.TABLE_TYPE.WORD,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,   0,          -1, null),
    new CCII_CONFIG_TABLE(  32, "COMP_REC",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          30, "CII_PART_DATA_RECEIVER"),
    new CCII_CONFIG_TABLE(  32, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  32, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  32, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  32, "IPAR_CHECK_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  32, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  32, "IPAR_DELAY_POS",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  32, "IPAR_DELAY_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  32, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  32, "LPAR_INDELAY_REGISTERED",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  32, "LPAR_OUTDELAY_REGISTERED",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  32, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  32, "MPAR_DELAY_CII",                  CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  32, "MPAR_CLK_INV_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  32, "MPAR_SWAP_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  32, "MPAR_CHECK_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  32, "MPAR_CHECK_DATA_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  32, "MPAR_CHECK_DATA_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  32, "MPAR_TEST_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  32, "MPAR_TEST_DATA_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  32, "MPAR_TEST_PART_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  32, "LPAR_VALID_CII",                  CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  32, "LPAR_TEST_DATA_CII",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  32, "BITS_CLK_INV",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  32, "BITS_SWAP_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  32, "BITS_CHECK_ENA",                  CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    146,   0,          -1, null),
    new CCII_CONFIG_TABLE(  32, "BITS_CHECK_DATA_ENA",             CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    146,   1,          -1, null),
    new CCII_CONFIG_TABLE(  32, "BITS_TEST_ENA",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    146,   2,          -1, null),
    new CCII_CONFIG_TABLE(  32, "BITS_TEST_DATA_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    146,   3,          -1, null),
    new CCII_CONFIG_TABLE(  32, "BITS_TEST_PART_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    146,   4,          -1, null),
    new CCII_CONFIG_TABLE(  32, "BITS_DELAY",                      CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  32, "WORD_CHECK_DATA",                 CIIlib.TABLE_TYPE.WORD,    4,    1,    1, CIIlib.TABLE_ACCESS.IR,    147,   0,          -1, null),
    new CCII_CONFIG_TABLE(  32, "WORD_TEST_DATA",                  CIIlib.TABLE_TYPE.WORD,   10,    1,    1, CIIlib.TABLE_ACCESS.RO,    148,   0,          -1, null),
    new CCII_CONFIG_TABLE(  32, "WORD_TEST_OR_DATA",               CIIlib.TABLE_TYPE.WORD,    5,    1,    1, CIIlib.TABLE_ACCESS.RO,    149,   0,          -1, null),
    new CCII_CONFIG_TABLE(  32, "WORD_SYNC_OR_DATA",               CIIlib.TABLE_TYPE.WORD,    5,    1,    1, CIIlib.TABLE_ACCESS.RO,    150,   0,          -1, null),
    new CCII_CONFIG_TABLE(  33, "COMP_TXEH",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,           0, "CII_MUX_DATA_SENDER"),
    new CCII_CONFIG_TABLE(  33, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  33, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  33, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  33, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  33, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  33, "IPAR_PART_CHECK_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  33, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  33, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  33, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  33, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  33, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  33, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  33, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  33, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  33, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  33, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  33, "LPAR_PART_INPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  33, "LPAR_PART_OUTPUT_REGISTERED",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  33, "MPAR_PART_SWAP_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  33, "MPAR_PART_CHECK_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  33, "MPAR_PART_CHECK_DATA_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  33, "MPAR_PART_CHECK_DATA_ENA_CII",    CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  33, "MPAR_PART_TEST_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  33, "MPAR_PART_TEST_DATA_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  33, "MPAR_PART_TEST_PART_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  33, "MPAR_PART_TEST_DATA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  33, "MPAR_MUX_CLK_INV_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  33, "LPAR_MUX_INPUT_REGISTERED",       CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  33, "LPAR_MUX_STROBE_AUTO_ENA",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  33, "LPAR_MUX_STROBE_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  33, "LPAR_MUX_OUTPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  33, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          20, null),
    new CCII_CONFIG_TABLE(  34, "COMP_SEND",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          33, "CII_PART_DATA_SENDER"),
    new CCII_CONFIG_TABLE(  34, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  34, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  34, "IPAR_CHECK_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  34, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  34, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  34, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  34, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  34, "MPAR_SWAP_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  34, "MPAR_CHECK_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  34, "MPAR_CHECK_DATA_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  34, "MPAR_CHECK_DATA_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  34, "MPAR_TEST_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  34, "MPAR_TEST_DATA_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  34, "MPAR_TEST_PART_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  34, "MPAR_TEST_DATA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  34, "BITS_SWAP_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  34, "BITS_CHECK_ENA",                  CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    151,   0,          -1, null),
    new CCII_CONFIG_TABLE(  34, "BITS_CHECK_DATA_ENA",             CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    151,   1,          -1, null),
    new CCII_CONFIG_TABLE(  34, "BITS_TEST_ENA",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    151,   2,          -1, null),
    new CCII_CONFIG_TABLE(  34, "BITS_TEST_DATA_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    151,   3,          -1, null),
    new CCII_CONFIG_TABLE(  34, "BITS_TEST_PART_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    151,   4,          -1, null),
    new CCII_CONFIG_TABLE(  34, "WORD_CHECK_DATA",                 CIIlib.TABLE_TYPE.WORD,    4,    1,    1, CIIlib.TABLE_ACCESS.IR,    152,   0,          -1, null),
    new CCII_CONFIG_TABLE(  34, "WORD_TEST_DATA",                  CIIlib.TABLE_TYPE.WORD,   10,    1,    1, CIIlib.TABLE_ACCESS.IR,    153,   0,          -1, null),
    new CCII_CONFIG_TABLE(  35, "COMP_MUX",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          33, "CII_DATA_MUX"),
    new CCII_CONFIG_TABLE(  35, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  35, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  35, "IPAR_MUX_DATA_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  35, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  35, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          20, null),
    new CCII_CONFIG_TABLE(  35, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  35, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  35, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  35, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  35, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  35, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  35, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  35, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  35, "LPAR_MUX_STROBE_AUTO_ENA",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  35, "MPAR_CLK_INV_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  35, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  35, "LPAR_MUX_INPUT_REGISTERED",       CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  35, "LPAR_MUX_OUTPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  35, "BITS_CLK_INV",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  36, "COMP_RXEH",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,           0, "CII_MUX_DATA_RECEIVER"),
    new CCII_CONFIG_TABLE(  36, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  36, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  36, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  36, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  36, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  36, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  36, "IPAR_PART_CHECK_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  36, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  36, "IPAR_DATA_DELAY_POS",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_DEMUX_STROBE_ENABLE",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_DEMUX_STROBE_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_DEMUX_PROCESS_REGISTERED",   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_DEMUX_OUTPUT_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  36, "IPAR_DEMUX_LAT_DELAY_POS",        CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  36, "MPAR_DEMUX_CLK_INV_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  36, "MPAR_DEMUX_CLK90_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  36, "MPAR_DEMUX_DELAY_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  36, "MPAR_DEMUX_LAT_DELAY_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  36, "LPAR_PART_INPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_PART_INDELAY_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_PART_OUTDELAY_REGISTERED",   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_PART_OUTPUT_REGISTERED",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  36, "MPAR_PART_DELAY_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  36, "MPAR_PART_CLK_INV_CII",           CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  36, "MPAR_PART_SWAP_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  36, "MPAR_PART_CHECK_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  36, "MPAR_PART_CHECK_DATA_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  36, "MPAR_PART_CHECK_DATA_ENA_CII",    CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  36, "MPAR_PART_TEST_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  36, "MPAR_PART_TEST_DATA_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  36, "MPAR_PART_TEST_PART_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  36, "LPAR_PART_VALID_CII",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  36, "LPAR_PART_TEST_DATA_CII",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  36, "IPAR_MUX_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  36, "IPAR_MUX_LAT_DELAY_DATA_WIDTH",   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  36, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          20, null),
    new CCII_CONFIG_TABLE(  36, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  36, "IPAR_PART_DELAY_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  37, "COMP_DEMUX",                      CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          36, "CII_DATA_DEMUX"),
    new CCII_CONFIG_TABLE(  37, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  37, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  37, "IPAR_MUX_DATA_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  37, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  37, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          20, null),
    new CCII_CONFIG_TABLE(  37, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  37, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  37, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  37, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  37, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  37, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  37, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  37, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  37, "IPAR_MUX_DELAY_POS",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  37, "IPAR_MUX_DELAY_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  37, "IPAR_MUX_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  37, "LPAR_STROBE_ENABLE",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  37, "LPAR_STROBE_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  37, "LPAR_PROCESS_REGISTERED",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  37, "IPAR_LAT_DELAY_POS",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  37, "IPAR_LAT_DELAY_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  37, "IPAR_LAT_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  37, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  37, "MPAR_MUX_CLK_INV_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  37, "MPAR_MUX_CLK90_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  37, "MPAR_MUX_DELAY_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  37, "MPAR_LAT_DELAY_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  37, "LPAR_DATA_CII",                   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  37, "WORD_MUX_CLK_INV",                CIIlib.TABLE_TYPE.BITS,    5,    1,    1, CIIlib.TABLE_ACCESS.IR,    154,   0,          -1, null),
    new CCII_CONFIG_TABLE(  37, "WORD_MUX_CLK90",                  CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  37, "WORD_MUX_DELAY",                  CIIlib.TABLE_TYPE.WORD,   10,    1,    1, CIIlib.TABLE_ACCESS.IR,    155,   0,          -1, null),
    new CCII_CONFIG_TABLE(  37, "WORD_LAT_DELAY",                  CIIlib.TABLE_TYPE.WORD,   10,    1,    1, CIIlib.TABLE_ACCESS.IR,    156,   0,          -1, null),
    new CCII_CONFIG_TABLE(  37, "WORD_DATA",                       CIIlib.TABLE_TYPE.WORD,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,   0,          -1, null),
    new CCII_CONFIG_TABLE(  38, "COMP_REC",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          36, "CII_PART_DATA_RECEIVER"),
    new CCII_CONFIG_TABLE(  38, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  38, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  38, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  38, "IPAR_CHECK_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  38, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  38, "IPAR_DELAY_POS",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  38, "IPAR_DELAY_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  38, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  38, "LPAR_INDELAY_REGISTERED",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  38, "LPAR_OUTDELAY_REGISTERED",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  38, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  38, "MPAR_DELAY_CII",                  CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  38, "MPAR_CLK_INV_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  38, "MPAR_SWAP_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  38, "MPAR_CHECK_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  38, "MPAR_CHECK_DATA_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  38, "MPAR_CHECK_DATA_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  38, "MPAR_TEST_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  38, "MPAR_TEST_DATA_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  38, "MPAR_TEST_PART_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  38, "LPAR_VALID_CII",                  CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  38, "LPAR_TEST_DATA_CII",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  38, "BITS_CLK_INV",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  38, "BITS_SWAP_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  38, "BITS_CHECK_ENA",                  CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    157,   0,          -1, null),
    new CCII_CONFIG_TABLE(  38, "BITS_CHECK_DATA_ENA",             CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    157,   1,          -1, null),
    new CCII_CONFIG_TABLE(  38, "BITS_TEST_ENA",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    157,   2,          -1, null),
    new CCII_CONFIG_TABLE(  38, "BITS_TEST_DATA_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    157,   3,          -1, null),
    new CCII_CONFIG_TABLE(  38, "BITS_TEST_PART_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    157,   4,          -1, null),
    new CCII_CONFIG_TABLE(  38, "BITS_DELAY",                      CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  38, "WORD_CHECK_DATA",                 CIIlib.TABLE_TYPE.WORD,    4,    1,    1, CIIlib.TABLE_ACCESS.IR,    158,   0,          -1, null),
    new CCII_CONFIG_TABLE(  38, "WORD_TEST_DATA",                  CIIlib.TABLE_TYPE.WORD,   10,    1,    1, CIIlib.TABLE_ACCESS.RO,    159,   0,          -1, null),
    new CCII_CONFIG_TABLE(  38, "WORD_TEST_OR_DATA",               CIIlib.TABLE_TYPE.WORD,    5,    1,    1, CIIlib.TABLE_ACCESS.RO,    160,   0,          -1, null),
    new CCII_CONFIG_TABLE(  38, "WORD_SYNC_OR_DATA",               CIIlib.TABLE_TYPE.WORD,    5,    1,    1, CIIlib.TABLE_ACCESS.RO,    161,   0,          -1, null),
    new CCII_CONFIG_TABLE(  39, "COMP_TXHH",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,           0, "CII_MUX_DATA_SENDER"),
    new CCII_CONFIG_TABLE(  39, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  39, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  39, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  39, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  39, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  39, "IPAR_PART_CHECK_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  39, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  39, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  39, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  39, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  39, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  39, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  39, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          -2, null),
    new CCII_CONFIG_TABLE(  39, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  39, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  39, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  39, "LPAR_PART_INPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  39, "LPAR_PART_OUTPUT_REGISTERED",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  39, "MPAR_PART_SWAP_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  39, "MPAR_PART_CHECK_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  39, "MPAR_PART_CHECK_DATA_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  39, "MPAR_PART_CHECK_DATA_ENA_CII",    CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  39, "MPAR_PART_TEST_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  39, "MPAR_PART_TEST_DATA_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  39, "MPAR_PART_TEST_PART_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  39, "MPAR_PART_TEST_DATA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  39, "MPAR_MUX_CLK_INV_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  39, "LPAR_MUX_INPUT_REGISTERED",       CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  39, "LPAR_MUX_STROBE_AUTO_ENA",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  39, "LPAR_MUX_STROBE_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  39, "LPAR_MUX_OUTPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  39, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  40, "COMP_SEND",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          39, "CII_PART_DATA_SENDER"),
    new CCII_CONFIG_TABLE(  40, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  40, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  40, "IPAR_CHECK_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  40, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  40, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  40, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  40, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  40, "MPAR_SWAP_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  40, "MPAR_CHECK_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  40, "MPAR_CHECK_DATA_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  40, "MPAR_CHECK_DATA_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  40, "MPAR_TEST_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  40, "MPAR_TEST_DATA_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  40, "MPAR_TEST_PART_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  40, "MPAR_TEST_DATA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  40, "BITS_SWAP_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  40, "BITS_CHECK_ENA",                  CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    162,   0,          -1, null),
    new CCII_CONFIG_TABLE(  40, "BITS_CHECK_DATA_ENA",             CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    162,   1,          -1, null),
    new CCII_CONFIG_TABLE(  40, "BITS_TEST_ENA",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    162,   2,          -1, null),
    new CCII_CONFIG_TABLE(  40, "BITS_TEST_DATA_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    162,   3,          -1, null),
    new CCII_CONFIG_TABLE(  40, "BITS_TEST_PART_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    162,   4,          -1, null),
    new CCII_CONFIG_TABLE(  40, "WORD_CHECK_DATA",                 CIIlib.TABLE_TYPE.WORD,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    163,   0,          -1, null),
    new CCII_CONFIG_TABLE(  40, "WORD_TEST_DATA",                  CIIlib.TABLE_TYPE.WORD,    4,    1,    1, CIIlib.TABLE_ACCESS.IR,    164,   0,          -1, null),
    new CCII_CONFIG_TABLE(  41, "COMP_MUX",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          39, "CII_DATA_MUX"),
    new CCII_CONFIG_TABLE(  41, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  41, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  41, "IPAR_MUX_DATA_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  41, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  41, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  41, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  41, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  41, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  41, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  41, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          -2, null),
    new CCII_CONFIG_TABLE(  41, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  41, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  41, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  41, "LPAR_MUX_STROBE_AUTO_ENA",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  41, "MPAR_CLK_INV_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  41, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  41, "LPAR_MUX_INPUT_REGISTERED",       CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  41, "LPAR_MUX_OUTPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  41, "BITS_CLK_INV",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  42, "COMP_RXHH",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,           0, "CII_MUX_DATA_RECEIVER"),
    new CCII_CONFIG_TABLE(  42, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  42, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  42, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  42, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  42, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  42, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  42, "IPAR_PART_CHECK_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  42, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  42, "IPAR_DATA_DELAY_POS",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_DEMUX_STROBE_ENABLE",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_DEMUX_STROBE_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_DEMUX_PROCESS_REGISTERED",   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_DEMUX_OUTPUT_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  42, "IPAR_DEMUX_LAT_DELAY_POS",        CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  42, "MPAR_DEMUX_CLK_INV_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  42, "MPAR_DEMUX_CLK90_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  42, "MPAR_DEMUX_DELAY_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  42, "MPAR_DEMUX_LAT_DELAY_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  42, "LPAR_PART_INPUT_REGISTERED",      CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_PART_INDELAY_REGISTERED",    CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_PART_OUTDELAY_REGISTERED",   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_PART_OUTPUT_REGISTERED",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  42, "MPAR_PART_DELAY_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  42, "MPAR_PART_CLK_INV_CII",           CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  42, "MPAR_PART_SWAP_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  42, "MPAR_PART_CHECK_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  42, "MPAR_PART_CHECK_DATA_CII",        CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  42, "MPAR_PART_CHECK_DATA_ENA_CII",    CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  42, "MPAR_PART_TEST_ENA_CII",          CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  42, "MPAR_PART_TEST_DATA_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  42, "MPAR_PART_TEST_PART_RND_ENA_CII", CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  42, "LPAR_PART_VALID_CII",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  42, "LPAR_PART_TEST_DATA_CII",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  42, "IPAR_MUX_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  42, "IPAR_MUX_LAT_DELAY_DATA_WIDTH",   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  42, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  42, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  42, "IPAR_PART_DELAY_WIDTH",           CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  43, "COMP_DEMUX",                      CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          42, "CII_DATA_DEMUX"),
    new CCII_CONFIG_TABLE(  43, "IPAR_MUX_WIDTH",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  43, "IPAR_MUX_MULTIPL",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  43, "IPAR_MUX_DATA_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  43, "LPAR_MUX_EXT_PHASE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  43, "IPAR_MUX_EXT_WIDTH",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  43, "LPAR_MUX_PHASE_POS",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  43, "LPAR_MUX_QPHASE_ENA",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  43, "LPAR_MUX_MCLK180_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  43, "LPAR_MUX_MCLK270_ADD",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  43, "IPAR_MUX_OVERCLOCK_MULTIPL",      CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  43, "LPAR_MUX_SYMMETRIZATION_ENA",     CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  43, "LPAR_MUX_PART_MODE_ENA",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  43, "LPAR_MUX_DECREASE_ENA",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  43, "IPAR_MUX_DELAY_POS",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, null),
    new CCII_CONFIG_TABLE(  43, "IPAR_MUX_DELAY_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  43, "IPAR_MUX_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  43, "LPAR_STROBE_ENABLE",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  43, "LPAR_STROBE_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  43, "LPAR_PROCESS_REGISTERED",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  43, "IPAR_LAT_DELAY_POS",              CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  43, "IPAR_LAT_DELAY_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  43, "IPAR_LAT_DELAY_DATA_WIDTH",       CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  43, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  43, "MPAR_MUX_CLK_INV_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  43, "MPAR_MUX_CLK90_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  43, "MPAR_MUX_DELAY_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  43, "MPAR_LAT_DELAY_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  43, "LPAR_DATA_CII",                   CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  43, "WORD_MUX_CLK_INV",                CIIlib.TABLE_TYPE.BITS,    5,    1,    1, CIIlib.TABLE_ACCESS.IR,    165,   0,          -1, null),
    new CCII_CONFIG_TABLE(  43, "WORD_MUX_CLK90",                  CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  43, "WORD_MUX_DELAY",                  CIIlib.TABLE_TYPE.WORD,   10,    1,    1, CIIlib.TABLE_ACCESS.IR,    166,   0,          -1, null),
    new CCII_CONFIG_TABLE(  43, "WORD_LAT_DELAY",                  CIIlib.TABLE_TYPE.WORD,   10,    1,    1, CIIlib.TABLE_ACCESS.IR,    167,   0,          -1, null),
    new CCII_CONFIG_TABLE(  43, "WORD_DATA",                       CIIlib.TABLE_TYPE.WORD,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,   0,          -1, null),
    new CCII_CONFIG_TABLE(  44, "COMP_REC",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          42, "CII_PART_DATA_RECEIVER"),
    new CCII_CONFIG_TABLE(  44, "IPAR_PART_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, null),
    new CCII_CONFIG_TABLE(  44, "IPAR_PART_NUM",                   CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, null),
    new CCII_CONFIG_TABLE(  44, "IPAR_TRANSM_DATA_WIDTH",          CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          10, null),
    new CCII_CONFIG_TABLE(  44, "IPAR_CHECK_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           4, null),
    new CCII_CONFIG_TABLE(  44, "IPAR_USER_DATA_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  44, "IPAR_DELAY_POS",                  CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  44, "IPAR_DELAY_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  44, "LPAR_INPUT_REGISTERED",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  44, "LPAR_INDELAY_REGISTERED",         CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  44, "LPAR_OUTDELAY_REGISTERED",        CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  44, "LPAR_OUTPUT_REGISTERED",          CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  44, "MPAR_DELAY_CII",                  CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  44, "MPAR_CLK_INV_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  44, "MPAR_SWAP_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  44, "MPAR_CHECK_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  44, "MPAR_CHECK_DATA_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  44, "MPAR_CHECK_DATA_ENA_CII",         CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  44, "MPAR_TEST_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  44, "MPAR_TEST_DATA_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  44, "MPAR_TEST_PART_RND_ENA_CII",      CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  44, "LPAR_VALID_CII",                  CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  44, "LPAR_TEST_DATA_CII",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  44, "BITS_CLK_INV",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  44, "BITS_SWAP_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  44, "BITS_CHECK_ENA",                  CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    168,   0,          -1, null),
    new CCII_CONFIG_TABLE(  44, "BITS_CHECK_DATA_ENA",             CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    168,   1,          -1, null),
    new CCII_CONFIG_TABLE(  44, "BITS_TEST_ENA",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    168,   2,          -1, null),
    new CCII_CONFIG_TABLE(  44, "BITS_TEST_DATA_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    168,   3,          -1, null),
    new CCII_CONFIG_TABLE(  44, "BITS_TEST_PART_RND_ENA",          CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    168,   4,          -1, null),
    new CCII_CONFIG_TABLE(  44, "BITS_DELAY",                      CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  44, "WORD_CHECK_DATA",                 CIIlib.TABLE_TYPE.WORD,    4,    1,    1, CIIlib.TABLE_ACCESS.IR,    169,   0,          -1, null),
    new CCII_CONFIG_TABLE(  44, "WORD_TEST_DATA",                  CIIlib.TABLE_TYPE.WORD,   10,    1,    1, CIIlib.TABLE_ACCESS.RO,    170,   0,          -1, null),
    new CCII_CONFIG_TABLE(  44, "WORD_TEST_OR_DATA",               CIIlib.TABLE_TYPE.WORD,    5,    1,    1, CIIlib.TABLE_ACCESS.RO,    171,   0,          -1, null),
    new CCII_CONFIG_TABLE(  44, "WORD_SYNC_OR_DATA",               CIIlib.TABLE_TYPE.WORD,    5,    1,    1, CIIlib.TABLE_ACCESS.RO,    172,   0,          -1, null),
    new CCII_CONFIG_TABLE(  45, "COMP_RATE",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    2, CIIlib.TABLE_ACCESS.NA,     -1,   0,           0, "CII_DPM_RATE"),
    new CCII_CONFIG_TABLE(  45, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          64, null),
    new CCII_CONFIG_TABLE(  45, "IPAR_COUNT_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          16, null),
    new CCII_CONFIG_TABLE(  45, "IPAR_ADDR_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  45, "INIT_CLEAR_ENA",                  CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  45, "MPAR_COUNT_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  45, "MPAR_SWITCH_CII",                 CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  45, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  45, "MPAR_SIM_LOOP_ENA_CII",           CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  45, "MPAR_PROC_REQ_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  45, "LPAR_PROC_ACK_CII",               CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  45, "BITS_COUNT_ENA",                  CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  45, "BITS_SWITCH",                     CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  45, "BITS_CHAN_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  45, "BITS_PROC_REQ",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  45, "BITS_PROC_ACK",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  46, "COMP_DPM",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          45, "CII_DPM"),
    new CCII_CONFIG_TABLE(  46, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          16, null),
    new CCII_CONFIG_TABLE(  46, "IPAR_ADDR_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  46, "LPAR_ADDR_SEPARATE",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  46, "MPAR_MEM_ENA_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  46, "MPAR_MEM_SWITCH_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  46, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  46, "MPAR_CHAN_SWITCH_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  46, "MPAR_DPM_SWITCH_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  46, "MPAR_MEM_SIM_ENA_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  46, "LPAR_MEM_ENA_ACK_CII",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  46, "LPAR_CHAN_ENA_ACK_CII",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  46, "LPAR_MEM_ACC_CII",                CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  46, "IPAR_MADDR_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  46, "BITS_MEM_ENA",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  46, "BITS_MEM_SWITCH",                 CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  46, "BITS_CHAN_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  46, "BITS_CHAN_SWITCH",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  46, "BITS_DPM_SWITCH",                 CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  46, "BITS_MEM_SIM_ENA",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  46, "BITS_MEM_ENA_ACK",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  46, "BITS_CHAN_ENA_ACK",               CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  46, "AREA_MEMORY",                     CIIlib.TABLE_TYPE.AREA,   16,   64,    1, CIIlib.TABLE_ACCESS.RW,    192,   0,          -1, null),
    new CCII_CONFIG_TABLE(  47, "COMP_RATE",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    2, CIIlib.TABLE_ACCESS.NA,     -1,   1,           0, "CII_DPM_RATE"),
    new CCII_CONFIG_TABLE(  47, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          64, null),
    new CCII_CONFIG_TABLE(  47, "IPAR_COUNT_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          16, null),
    new CCII_CONFIG_TABLE(  47, "IPAR_ADDR_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  47, "INIT_CLEAR_ENA",                  CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  47, "MPAR_COUNT_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  47, "MPAR_SWITCH_CII",                 CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  47, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  47, "MPAR_SIM_LOOP_ENA_CII",           CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  47, "MPAR_PROC_REQ_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  47, "LPAR_PROC_ACK_CII",               CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  47, "BITS_COUNT_ENA",                  CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  47, "BITS_SWITCH",                     CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  47, "BITS_CHAN_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  47, "BITS_PROC_REQ",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  47, "BITS_PROC_ACK",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  48, "COMP_DPM",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          47, "CII_DPM"),
    new CCII_CONFIG_TABLE(  48, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          16, null),
    new CCII_CONFIG_TABLE(  48, "IPAR_ADDR_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  48, "LPAR_ADDR_SEPARATE",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  48, "MPAR_MEM_ENA_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  48, "MPAR_MEM_SWITCH_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  48, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  48, "MPAR_CHAN_SWITCH_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  48, "MPAR_DPM_SWITCH_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  48, "MPAR_MEM_SIM_ENA_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  48, "LPAR_MEM_ENA_ACK_CII",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  48, "LPAR_CHAN_ENA_ACK_CII",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  48, "LPAR_MEM_ACC_CII",                CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  48, "IPAR_MADDR_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           6, null),
    new CCII_CONFIG_TABLE(  48, "BITS_MEM_ENA",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  48, "BITS_MEM_SWITCH",                 CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  48, "BITS_CHAN_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  48, "BITS_CHAN_SWITCH",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  48, "BITS_DPM_SWITCH",                 CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  48, "BITS_MEM_SIM_ENA",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  48, "BITS_MEM_ENA_ACK",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  48, "BITS_CHAN_ENA_ACK",               CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  48, "AREA_MEMORY",                     CIIlib.TABLE_TYPE.AREA,   16,   64,    1, CIIlib.TABLE_ACCESS.RW,    256,   0,          -1, null),
    new CCII_CONFIG_TABLE(  49, "COMP_HIST",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    4, CIIlib.TABLE_ACCESS.NA,     -1,   0,           0, "CII_DPM_HIST"),
    new CCII_CONFIG_TABLE(  49, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          13, null),
    new CCII_CONFIG_TABLE(  49, "IPAR_COUNT_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          16, null),
    new CCII_CONFIG_TABLE(  49, "INIT_CLEAR_ENA",                  CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  49, "MPAR_COUNT_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  49, "MPAR_SWITCH_CII",                 CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  49, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  49, "MPAR_SIM_LOOP_ENA_CII",           CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  49, "MPAR_PROC_REQ_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  49, "LPAR_PROC_ACK_CII",               CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  49, "BITS_COUNT_ENA",                  CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  49, "BITS_SWITCH",                     CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  49, "BITS_CHAN_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  49, "BITS_PROC_REQ",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  49, "BITS_PROC_ACK",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  50, "COMP_DPM",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          49, "CII_DPM"),
    new CCII_CONFIG_TABLE(  50, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          16, null),
    new CCII_CONFIG_TABLE(  50, "IPAR_ADDR_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          13, null),
    new CCII_CONFIG_TABLE(  50, "LPAR_ADDR_SEPARATE",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  50, "MPAR_MEM_ENA_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  50, "MPAR_MEM_SWITCH_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  50, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  50, "MPAR_CHAN_SWITCH_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  50, "MPAR_DPM_SWITCH_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  50, "MPAR_MEM_SIM_ENA_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  50, "LPAR_MEM_ENA_ACK_CII",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  50, "LPAR_CHAN_ENA_ACK_CII",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  50, "LPAR_MEM_ACC_CII",                CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  50, "IPAR_MADDR_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          13, null),
    new CCII_CONFIG_TABLE(  50, "BITS_MEM_ENA",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  50, "BITS_MEM_SWITCH",                 CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  50, "BITS_CHAN_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  50, "BITS_CHAN_SWITCH",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  50, "BITS_DPM_SWITCH",                 CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  50, "BITS_MEM_SIM_ENA",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  50, "BITS_MEM_ENA_ACK",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  50, "BITS_CHAN_ENA_ACK",               CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  50, "AREA_MEMORY",                     CIIlib.TABLE_TYPE.AREA,   16, 8192,    1, CIIlib.TABLE_ACCESS.RW,   8192,   0,          -1, null),
    new CCII_CONFIG_TABLE(  51, "COMP_HIST",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    4, CIIlib.TABLE_ACCESS.NA,     -1,   1,           0, "CII_DPM_HIST"),
    new CCII_CONFIG_TABLE(  51, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          13, null),
    new CCII_CONFIG_TABLE(  51, "IPAR_COUNT_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          16, null),
    new CCII_CONFIG_TABLE(  51, "INIT_CLEAR_ENA",                  CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  51, "MPAR_COUNT_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  51, "MPAR_SWITCH_CII",                 CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  51, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  51, "MPAR_SIM_LOOP_ENA_CII",           CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  51, "MPAR_PROC_REQ_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  51, "LPAR_PROC_ACK_CII",               CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  51, "BITS_COUNT_ENA",                  CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  51, "BITS_SWITCH",                     CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  51, "BITS_CHAN_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  51, "BITS_PROC_REQ",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  51, "BITS_PROC_ACK",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  52, "COMP_DPM",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          51, "CII_DPM"),
    new CCII_CONFIG_TABLE(  52, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          16, null),
    new CCII_CONFIG_TABLE(  52, "IPAR_ADDR_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          13, null),
    new CCII_CONFIG_TABLE(  52, "LPAR_ADDR_SEPARATE",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  52, "MPAR_MEM_ENA_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  52, "MPAR_MEM_SWITCH_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  52, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  52, "MPAR_CHAN_SWITCH_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  52, "MPAR_DPM_SWITCH_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  52, "MPAR_MEM_SIM_ENA_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  52, "LPAR_MEM_ENA_ACK_CII",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  52, "LPAR_CHAN_ENA_ACK_CII",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  52, "LPAR_MEM_ACC_CII",                CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  52, "IPAR_MADDR_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          13, null),
    new CCII_CONFIG_TABLE(  52, "BITS_MEM_ENA",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  52, "BITS_MEM_SWITCH",                 CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  52, "BITS_CHAN_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  52, "BITS_CHAN_SWITCH",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  52, "BITS_DPM_SWITCH",                 CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  52, "BITS_MEM_SIM_ENA",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  52, "BITS_MEM_ENA_ACK",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  52, "BITS_CHAN_ENA_ACK",               CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  52, "AREA_MEMORY",                     CIIlib.TABLE_TYPE.AREA,   16, 8192,    1, CIIlib.TABLE_ACCESS.RW,  16384,   0,          -1, null),
    new CCII_CONFIG_TABLE(  53, "COMP_HIST",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    4, CIIlib.TABLE_ACCESS.NA,     -1,   2,           0, "CII_DPM_HIST"),
    new CCII_CONFIG_TABLE(  53, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          13, null),
    new CCII_CONFIG_TABLE(  53, "IPAR_COUNT_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          16, null),
    new CCII_CONFIG_TABLE(  53, "INIT_CLEAR_ENA",                  CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  53, "MPAR_COUNT_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  53, "MPAR_SWITCH_CII",                 CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  53, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  53, "MPAR_SIM_LOOP_ENA_CII",           CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  53, "MPAR_PROC_REQ_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  53, "LPAR_PROC_ACK_CII",               CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  53, "BITS_COUNT_ENA",                  CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  53, "BITS_SWITCH",                     CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  53, "BITS_CHAN_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  53, "BITS_PROC_REQ",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  53, "BITS_PROC_ACK",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  54, "COMP_DPM",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          53, "CII_DPM"),
    new CCII_CONFIG_TABLE(  54, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          16, null),
    new CCII_CONFIG_TABLE(  54, "IPAR_ADDR_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          13, null),
    new CCII_CONFIG_TABLE(  54, "LPAR_ADDR_SEPARATE",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  54, "MPAR_MEM_ENA_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  54, "MPAR_MEM_SWITCH_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  54, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  54, "MPAR_CHAN_SWITCH_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  54, "MPAR_DPM_SWITCH_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  54, "MPAR_MEM_SIM_ENA_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  54, "LPAR_MEM_ENA_ACK_CII",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  54, "LPAR_CHAN_ENA_ACK_CII",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  54, "LPAR_MEM_ACC_CII",                CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  54, "IPAR_MADDR_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          13, null),
    new CCII_CONFIG_TABLE(  54, "BITS_MEM_ENA",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  54, "BITS_MEM_SWITCH",                 CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  54, "BITS_CHAN_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  54, "BITS_CHAN_SWITCH",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  54, "BITS_DPM_SWITCH",                 CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  54, "BITS_MEM_SIM_ENA",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  54, "BITS_MEM_ENA_ACK",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  54, "BITS_CHAN_ENA_ACK",               CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  54, "AREA_MEMORY",                     CIIlib.TABLE_TYPE.AREA,   16, 8192,    1, CIIlib.TABLE_ACCESS.RW,  24576,   0,          -1, null),
    new CCII_CONFIG_TABLE(  55, "COMP_HIST",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    4, CIIlib.TABLE_ACCESS.NA,     -1,   3,           0, "CII_DPM_HIST"),
    new CCII_CONFIG_TABLE(  55, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          13, null),
    new CCII_CONFIG_TABLE(  55, "IPAR_COUNT_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          16, null),
    new CCII_CONFIG_TABLE(  55, "INIT_CLEAR_ENA",                  CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  55, "MPAR_COUNT_ENA_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  55, "MPAR_SWITCH_CII",                 CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  55, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  55, "MPAR_SIM_LOOP_ENA_CII",           CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  55, "MPAR_PROC_REQ_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  55, "LPAR_PROC_ACK_CII",               CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  55, "BITS_COUNT_ENA",                  CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  55, "BITS_SWITCH",                     CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  55, "BITS_CHAN_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  55, "BITS_PROC_REQ",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  55, "BITS_PROC_ACK",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  56, "COMP_DPM",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          55, "CII_DPM"),
    new CCII_CONFIG_TABLE(  56, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          16, null),
    new CCII_CONFIG_TABLE(  56, "IPAR_ADDR_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          13, null),
    new CCII_CONFIG_TABLE(  56, "LPAR_ADDR_SEPARATE",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  56, "MPAR_MEM_ENA_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  56, "MPAR_MEM_SWITCH_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  56, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  56, "MPAR_CHAN_SWITCH_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  56, "MPAR_DPM_SWITCH_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  56, "MPAR_MEM_SIM_ENA_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  56, "LPAR_MEM_ENA_ACK_CII",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  56, "LPAR_CHAN_ENA_ACK_CII",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  56, "LPAR_MEM_ACC_CII",                CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  56, "IPAR_MADDR_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          13, null),
    new CCII_CONFIG_TABLE(  56, "BITS_MEM_ENA",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  56, "BITS_MEM_SWITCH",                 CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  56, "BITS_CHAN_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  56, "BITS_CHAN_SWITCH",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  56, "BITS_DPM_SWITCH",                 CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  56, "BITS_MEM_SIM_ENA",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  56, "BITS_MEM_ENA_ACK",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  56, "BITS_CHAN_ENA_ACK",               CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  56, "AREA_MEMORY",                     CIIlib.TABLE_TYPE.AREA,   16, 8192,    1, CIIlib.TABLE_ACCESS.RW,  32768,   0,          -1, null),
    new CCII_CONFIG_TABLE(  57, "COMP_DAQ",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,           0, "CII_DPM_FLASH"),
    new CCII_CONFIG_TABLE(  57, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,        3320, null),
    new CCII_CONFIG_TABLE(  57, "IPAR_DEL_LENGTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  57, "IPAR_PIPE_LENGTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,         512, null),
    new CCII_CONFIG_TABLE(  57, "MPAR_DATA_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  57, "MPAR_TRIGGER_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  57, "MPAR_DEL_LENGTH_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  57, "LPAR_DATA_READY_CII",             CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  57, "MPAR_PIPE_LENGTH_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  57, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  57, "MPAR_PROC_REQ_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  57, "LPAR_PROC_ACK_CII",               CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  57, "IPAR_DEL_ADDR_WIDTH",             CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  57, "IPAR_PIPE_ADDR_WIDTH",            CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           9, null),
    new CCII_CONFIG_TABLE(  57, "BITS_DATA_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  57, "BITS_TRIGGER",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  57, "BITS_DATA_READY",                 CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.RO,    173,   0,          -1, null),
    new CCII_CONFIG_TABLE(  58, "COMP_DEL",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          57, "CII_DPM_DEL"),
    new CCII_CONFIG_TABLE(  58, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,        3320, null),
    new CCII_CONFIG_TABLE(  58, "IPAR_DEL_LENGTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  58, "MPAR_CLK_ENA_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  58, "LPAR_INPUT_REG",                  CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  58, "LPAR_OUTPUT_REG",                 CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  58, "MPAR_LENGTH_CII",                 CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  58, "MPAR_PROC_REQ_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  58, "LPAR_PROC_ACK_CII",               CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  58, "LPAR_MEM_ACC_CII",                CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  58, "IPAR_ADDR_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  59, "COMP_PIPE",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          58, "CII_DPM_PIPE"),
    new CCII_CONFIG_TABLE(  59, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,        3320, null),
    new CCII_CONFIG_TABLE(  59, "IPAR_PIPE_LENGTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  59, "MPAR_CLK_ENA_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  59, "MPAR_INPUT_CII",                  CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  59, "MPAR_WORK_MODE",                  CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_WORK_MODE"),
    new CCII_CONFIG_TABLE(  59, "LPAR_OUTPUT_REG",                 CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  59, "MPAR_PIPE_INIT_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  59, "MPAR_LENGTH_CII",                 CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  59, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  59, "MPAR_PROC_REQ_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           3, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  59, "LPAR_PROC_ACK_CII",               CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  59, "LPAR_MEM_ACC_CII",                CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  59, "IPAR_ADDR_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  59, "BITS_CLK_ENA",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  59, "BITS_PIPE_INIT",                  CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  59, "BITS_PROC_REQ",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  59, "BITS_PROC_ACK",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  59, "WORD_LENGTH",                     CIIlib.TABLE_TYPE.WORD,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,   0,          -1, null),
    new CCII_CONFIG_TABLE(  60, "COMP_DPM",                        CIIlib.TABLE_TYPE.COMP,   -1,   -1,    0, CIIlib.TABLE_ACCESS.NA,     -1,  -1,          59, "CII_DPM"),
    new CCII_CONFIG_TABLE(  61, "COMP_PIPE",                       CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          57, "CII_DPM_PIPE"),
    new CCII_CONFIG_TABLE(  61, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,        3320, null),
    new CCII_CONFIG_TABLE(  61, "IPAR_PIPE_LENGTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,         512, null),
    new CCII_CONFIG_TABLE(  61, "MPAR_CLK_ENA_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  61, "MPAR_INPUT_CII",                  CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  61, "MPAR_WORK_MODE",                  CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_WORK_MODE"),
    new CCII_CONFIG_TABLE(  61, "LPAR_OUTPUT_REG",                 CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  61, "MPAR_PIPE_INIT_CII",              CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  61, "MPAR_LENGTH_CII",                 CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  61, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  61, "MPAR_PROC_REQ_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  61, "LPAR_PROC_ACK_CII",               CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  61, "LPAR_MEM_ACC_CII",                CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  61, "IPAR_ADDR_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           9, null),
    new CCII_CONFIG_TABLE(  61, "BITS_CLK_ENA",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  61, "BITS_PIPE_INIT",                  CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  61, "BITS_PROC_REQ",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.IR,    174,   0,          -1, null),
    new CCII_CONFIG_TABLE(  61, "BITS_PROC_ACK",                   CIIlib.TABLE_TYPE.BITS,    1,    1,    1, CIIlib.TABLE_ACCESS.RO,    174,   1,          -1, null),
    new CCII_CONFIG_TABLE(  61, "WORD_LENGTH",                     CIIlib.TABLE_TYPE.WORD,    9,    1,    1, CIIlib.TABLE_ACCESS.IR,    175,   0,          -1, null),
    new CCII_CONFIG_TABLE(  62, "COMP_DPM",                        CIIlib.TABLE_TYPE.COMP,   32,   20,    1, CIIlib.TABLE_ACCESS.NA,     -1,   0,          61, "CII_DPM"),
    new CCII_CONFIG_TABLE(  62, "IPAR_DATA_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,        3320, null),
    new CCII_CONFIG_TABLE(  62, "IPAR_ADDR_WIDTH",                 CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           9, null),
    new CCII_CONFIG_TABLE(  62, "LPAR_ADDR_SEPARATE",              CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  62, "MPAR_MEM_ENA_CII",                CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           5, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  62, "MPAR_MEM_SWITCH_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  62, "MPAR_CHAN_ENA_CII",               CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  62, "MPAR_CHAN_SWITCH_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  62, "MPAR_DPM_SWITCH_CII",             CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  62, "MPAR_MEM_SIM_ENA_CII",            CIIlib.TABLE_TYPE.MPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           2, "LIST_INTERF_CTRL"),
    new CCII_CONFIG_TABLE(  62, "LPAR_MEM_ENA_ACK_CII",            CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  62, "LPAR_CHAN_ENA_ACK_CII",           CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           0, null),
    new CCII_CONFIG_TABLE(  62, "LPAR_MEM_ACC_CII",                CIIlib.TABLE_TYPE.LPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,           1, null),
    new CCII_CONFIG_TABLE(  62, "IPAR_MADDR_WIDTH",                CIIlib.TABLE_TYPE.IPAR,    0,    1,    1, CIIlib.TABLE_ACCESS.NA,      0,   0,          16, null),
    new CCII_CONFIG_TABLE(  62, "BITS_MEM_ENA",                    CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  62, "BITS_MEM_SWITCH",                 CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  62, "BITS_CHAN_ENA",                   CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  62, "BITS_CHAN_SWITCH",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  62, "BITS_DPM_SWITCH",                 CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  62, "BITS_MEM_SIM_ENA",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.IR,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  62, "BITS_MEM_ENA_ACK",                CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  62, "BITS_CHAN_ENA_ACK",               CIIlib.TABLE_TYPE.BITS,    0,    0,    0, CIIlib.TABLE_ACCESS.RO,     -1,  -1,          -1, null),
    new CCII_CONFIG_TABLE(  62, "AREA_MEMORY",                     CIIlib.TABLE_TYPE.AREA, 3320,  512,    1, CIIlib.TABLE_ACCESS.RW,  40960,   0,          -1, null),
    new CCII_CONFIG_TABLE(  -1, null,                 CIIlib.TABLE_TYPE.COMP,   -1,   -1,   -1, CIIlib.TABLE_ACCESS.NA,     -1,  -1,           0, null)
  };
  public static final CCII_TABLE_INDEX ITAB = new CCII_TABLE_INDEX(_tab);
};
